Architecture of Computing Systems - ARCS 2010 - Taschenbuch

EAN (ISBN-13): 9783642119491
ISBN (ISBN-10): 3642119492
Gebundene Ausgabe
Taschenbuch
Erscheinungsjahr: 2010
Herausgeber: Springer Berlin
247 Seiten
Gewicht: 0,405 kg
Sprache: eng/Englisch

Buch in der Datenbank seit 2007-08-14T04:33:56+02:00 (Berlin)
Detailseite zuletzt geändert am 2023-07-21T20:13:55+02:00 (Berlin)
ISBN/EAN: 9783642119491

ISBN - alternative Schreibweisen:
3-642-11949-2, 978-3-642-11949-1
Alternative Schreibweisen und verwandte Suchbegriffe:
Autor des Buches: ller, christian wolf, wolfgan müller, karl christ, karl von mueller, karl muller, christian wolfgang schloer müller yehia karl sami, karl hermann müller
Titel des Buches: computer architecture proceedings, arc, system, international architecture proceedings conference computing february hannover germany systems 2010 2010 23rd arcs

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Daten vom Verlag:

Autor/in: Christian Müller-Schloer; Wolfgang Karl; Sami Yehia
Titel: Theoretical Computer Science and General Issues; Lecture Notes in Computer Science; Architecture of Computing Systems - ARCS 2010 - 23rd International Conference, Hannover, Germany, February 22-25, 2010, Proceedings
Verlag: Springer; Springer Berlin
247 Seiten
Erscheinungsjahr: 2010-02-17
Berlin; Heidelberg; DE
Sprache: Englisch
53,49 € (DE)
54,99 € (AT)
59,00 CHF (CH)
Available
XIII, 247 p. 105 illus.

BC; Hardcover, Softcover / Informatik, EDV/Datenkommunikation, Netzwerke; Netzwerk-Hardware; Verstehen; Informatik; Open Source; complexity; design; embedded systems; model construction; modeling; programming; Computer Communication Networks; Computer Engineering and Networks; Computer System Implementation; Operating Systems; Software Engineering; Computer and Information Systems Applications; Computerhardware; Systemanalyse und -design; Betriebssysteme; Software Engineering; Angewandte Informatik; EA

Keynote.- HyVM - Hybrid Virtual Machines - Efficient Use of Future Heterogeneous Chip Multiprocessors.- Processor Design.- How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT.- Complexity-Effective Rename Table Design for Rapid Speculation Recovery.- An Embedded GC Module with Support for Multiple Mutators and Weak References.- Embedded Systems.- A Hierarchical Distributed Control for Power and Performances Optimization of Embedded Systems.- Autonomic Workload Management for Multi-core Processor Systems.- Firefly Flashing Synchronization as Inspiration for Self-synchronization of Walking Robot Gait Patterns Using a Decentralized Robot Control Architecture.- Organic Computing and Self-organization.- The JoSchKa System: Organic Job Distribution in Heterogeneous and Unreliable Environments.- On Deadlocks and Fairness in Self-organizing Resource-Flow Systems.- Ad-Hoc Information Spread between Mobile Devices: A Case Study in Analytical Modeling of Controlled Self-organization in IT Systems.- Processor Design and Transactional Memory.- MLP-Aware Instruction Queue Resizing: The Key to Power-Efficient Performance.- Exploiting Inactive Rename Slots for Detecting Soft Errors.- Efficient Transaction Nesting in Hardware Transactional Memory.- Energy Management in Distributed Environments and Ad-Hoc Grids.- Decentralized Energy-Management to Control Smart-Home Architectures.- EnergySaving Cluster Roll: Power Saving System for Clusters.- Effect of the Degree of Neighborhood on Resource Discovery in Ad Hoc Grids.- Performance Modelling and Benchmarking.- Compiler-Directed Performance Model Construction for Parallel Programs.- A Method for Accurate High-Level Performance Evaluation of MPSoC Architectures Using Fine-Grained Generated Traces.- JetBench:An Open Source Real-time Multiprocessor Benchmark.- Accelerators and GPUs.- A Tightly Coupled Accelerator Infrastructure for Exact Arithmetics.- Optimizing Stencil Application on Multi-thread GPU Architecture Using Stream Programming Model.
Fast track conference proceeding Unique visibility State-of-the-Art research