ISBN: 9783030964146
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ISBN: 9783030964146
The complexity of modern chip design requires extensive use of specialized software throughout the process. To achieve the best results, a user of this software needs a high-level underst… Mehr…
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2022, ISBN: 9783030964146
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VLSI Physical Design: From Graph Partitioning to Timing Closure: Layoutsynthese Elektronischer Schaltungen - gebunden oder broschiert
2022, ISBN: 9783030964146
Springer, Gebundene Ausgabe, Auflage: 2nd ed. 2022, 334 Seiten, Publiziert: 2022-06-16T00:00:01Z, Produktgruppe: Buch, Hersteller-Nr.: 9783030964146, 0.67 kg, Verkaufsrang: 2073861, CAD &… Mehr…
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2022, ISBN: 3030964140
2nd ed. 2022 Gebundene Ausgabe Elektronik, Computer-Aided Design (CAD), Rechnerarchitektur und Logik-Entwurf, VLSIDesignTextbook; EmbeddedSystemsTextbook; Real-TimeSystemsTextbook; Hard… Mehr…
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ISBN: 9783030964146
[ED: Hardcover], [PU: Springer / Springer Berlin / Springer International Publishing / Springer, Berlin], The complexity of modern chip design requires extensive use of specialized softwa… Mehr…
ISBN: 9783030964146
The complexity of modern chip design requires extensive use of specialized software throughout the process. To achieve the best results, a user of this software needs a high-level underst… Mehr…
VLSI Physical Design: From Graph Partitioning to Timing Closure: Layoutsynthese Elektronischer Schaltungen - gebunden oder broschiert
2022
ISBN: 9783030964146
Springer, Gebundene Ausgabe, Auflage: 2nd ed. 2022, 334 Seiten, Publiziert: 2022-06-16T00:00:01Z, Produktgruppe: Buch, Hersteller-Nr.: 9783030964146, 0.67 kg, Verkaufsrang: 2073861, CAD &… Mehr…
VLSI Physical Design: From Graph Partitioning to Timing Closure: Layoutsynthese Elektronischer Schaltungen - gebunden oder broschiert
2022, ISBN: 9783030964146
Springer, Gebundene Ausgabe, Auflage: 2nd ed. 2022, 334 Seiten, Publiziert: 2022-06-16T00:00:01Z, Produktgruppe: Buch, Hersteller-Nr.: 9783030964146, 0.67 kg, Verkaufsrang: 2073861, CAD &… Mehr…
2022, ISBN: 3030964140
2nd ed. 2022 Gebundene Ausgabe Elektronik, Computer-Aided Design (CAD), Rechnerarchitektur und Logik-Entwurf, VLSIDesignTextbook; EmbeddedSystemsTextbook; Real-TimeSystemsTextbook; Hard… Mehr…
Bibliographische Daten des bestpassenden Buches
Detailangaben zum Buch - VLSI Physical Design: From Graph Partitioning to Timing Closure: Layoutsynthese Elektronischer Schaltungen
EAN (ISBN-13): 9783030964146
ISBN (ISBN-10): 3030964140
Gebundene Ausgabe
Erscheinungsjahr: 2022
Herausgeber: Springer
Buch in der Datenbank seit 2022-08-03T00:56:28+02:00 (Berlin)
Detailseite zuletzt geändert am 2024-03-14T14:09:24+01:00 (Berlin)
ISBN/EAN: 9783030964146
ISBN - alternative Schreibweisen:
3-030-96414-0, 978-3-030-96414-6
Alternative Schreibweisen und verwandte Suchbegriffe:
Autor des Buches: markov
Titel des Buches: vlsi
Daten vom Verlag:
Autor/in: Andrew B. Kahng; Jens Lienig; Igor L. Markov; Jin Hu
Titel: VLSI Physical Design: From Graph Partitioning to Timing Closure
Verlag: Springer; Springer International Publishing
317 Seiten
Erscheinungsjahr: 2022-06-16
Cham; CH
Gedruckt / Hergestellt in Niederlande.
Sprache: Englisch
90,94 € (DE)
93,49 € (AT)
100,50 CHF (CH)
POD
XVII, 317 p. 335 illus. in color.
BB; Hardcover, Softcover / Technik/Elektronik, Elektrotechnik, Nachrichtentechnik; Schaltkreise und Komponenten (Bauteile); Verstehen; VLSI design textbook; Embedded Systems Textbook; Real-Time Systems Textbook; Hardware/Software Codesign Textbook; design automation; Electronic Circuits and Systems; Logic Design; Electronics and Microelectronics, Instrumentation; Computer-Aided Engineering (CAD, CAE) and Design; Rechnerarchitektur und Logik-Entwurf; Elektronik; Computer-Aided Design (CAD); BB; EA; BC
The complexity of modern chip design requires extensive use of specialized software throughout the process. To achieve the best results, a user of this software needs a high-level understanding of the underlying mathematical models and algorithms. In addition, a developer of such software must have a keen understanding of relevant computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. This book introduces and compares the fundamental algorithms that are used during the IC physical design phase, wherein a geometric chip layout is produced starting from an abstract circuit design. This updated second edition includes recent advancements in the state-of-the-art of physical design, and builds upon foundational coverage of essential and fundamental techniques. Numerous examples and tasks with solutions increase the clarity of presentation and facilitate deeper understanding. A comprehensive set of slides is available on the Internet for each chapter, simplifying use of the book in instructional settings.
Dr. Leon Stok, Vice President, Electronic Design Automation, IBM Systems Group
Dr. Louis K. Scheffer, Howard Hughes Medical Institute
Prof. John P. Hayes, University of Michigan
Prof. Kurt Keutzer, University of California, Berkeley
Prof. Sachin Sapatnekar, University of Minnesota
“This improved, second edition of the book will continue to serve the EDA and design community well. It is a foundational text and reference for the next generation of professionals who will be called on to continue the advancement of our chip design tools and design the most advanced micro-electronics.” “This is the book I wish I had when I taught EDA in the past, and the one I’m using from now on.” “I would happily use this book when teaching Physical Design. I know of no other work that’s as comprehensive and up-to-date, with algorithmic focus and clear pseudocode for the key algorithms. The book is beautifully designed!” “The entire field of electronic design automation owes the authors a great debt for providing a single coherent source on physical design that is clear and tutorial in nature, while providing details on key state-of-the-art topics such as timing closure.” “An excellent balance of the basics and more advanced concepts, presented by top experts in the field.”1 Introduction.- 2 Netlist and System Partitioning.- 3 Chip Planning.- 4 Global and Detailed Placement.- 5 Global Routing.- 6 Detailed Routing.- 7 Specialized Routing.- 8 Timing Closure. A Solutions to Chapter Exercises.- B Example CMOS Cell Layouts.
Andrew B. Kahng is Professor of CSE and ECE at UC San Diego, where he holds the endowed chair in High-Performance Computing. He has served as visiting scientist at Cadence (1995-1997) and as founder, chairman and CTO at Blaze DFM (2004-2006).
Jens Lienig is Professor of Electrical Engineering at TU Dresden. He is also the director of the Institute of Electromechanical and Electronic Design at TUD. He has worked as project manager at Tanner Research, Inc. (1996-1999) and Robert Bosch GmbH (1999-2002).
Igor L. Markov is a Fellow of IEEE and an ACM Distinguished Scientist. In addition to his career as a Professor of Electrical Engineering and Computer Science at the University of Michigan, he has worked at Google (2014-2017) and has been with Facebook since 2018.
Jin Hu was a PhD student at the Computer Science and Engineering (CSE) Division at the University of Michigan. Afterwards, she has been with IBM Corp. (2013-2017), Bloomberg L.P. (2017-2019) and Two Sigma Insurance Quantified (TSIQ) (since 2019).
The complexity of modern chip design requires extensive use of specialized software throughout the process. To achieve the best results, a user of this software needs a high-level understanding of the underlying mathematical models and algorithms. In addition, a developer of such software must have a keen understanding of relevant computer science aspects, including algorithmic performance bottlenecks and how various algorithms operate and interact. This book introduces and compares the fundamental algorithms that are used during the IC physical design phase, wherein a geometric chip layout is produced starting from an abstract circuit design. This updated second edition includes recent advancements in the state-of-the-art of physical design, and builds upon foundational coverage of essential and fundamental techniques. Numerous examples and tasks with solutions increase the clarity of presentation and facilitate deeper understanding. A comprehensive set of slides is available on the Internet for each chapter, simplifying use of the book in instructional settings.
Prof. Sachin Sapatnekar, University of Minnesota
“This improved, second edition of the book will continue to serve the EDA and design community well. It is a foundational text and reference for the next generation of professionals who will be called on to continue the advancement of our chip design tools and design the most advanced micro-electronics.” (Dr. Leon Stok, Vice President, Electronic Design Automation, IBM Systems Group)
“This is the book I wish I had when I taught EDA in the past, and the one I’m using from now on.” (Dr. Louis K. Scheffer, Howard Hughes Medical Institute)
“I would happily use this book when teaching Physical Design. I know of no other work that’s as comprehensive and up-to-date, with algorithmic focus and clear pseudocode for the key algorithms. The book is beautifully designed!” (Prof. John P. Hayes, University of Michigan)
“The entire field of electronic design automation owes the authors a great debt for providing a single coherent source onphysical design that is clear and tutorial in nature, while providing details on key state-of-the-art topics such as timing closure.” (Prof. Kurt Keutzer, University of California, Berkeley)
“An excellent balance of the basics and more advanced concepts, presented by top experts in the field.” (Prof. Sachin Sapatnekar, University of Minnesota)
Comprehensive textbook coverage of physical design of integrated circuits, PCBs and MCMs A chapter on timing closure that includes a discussion of design flows Detailed illustrations of key concepts, numerous examples, and tasks with solutions
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